A systematic IP and bus subsystem modeling for platform-based system design

Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim
2006 Proceedings of the Design Automation & Test in Europe Conference  
The topic on platform-based system modeling has received a great deal of attention today. One of the important tasks that significantly affect the effectiveness and efficiency of the system modeling is the modeling of IP components and communication between IPs. To be effective, it is generally accepted that the system modeling should be performed in two steps; In the first step, a fast but some inaccurate system modeling is considered to facilitate the simultaneous development of software and
more » ... ardware. The second step then refines the models of the software and hardware blocks (i.e., IPs) to increase the simulation accuracy for the system performance analysis. Here, one critical factor required for a successful system modeling is a systematic modeling of the IP blocks and bus subsystem connecting the IPs. In this respect, this work addresses the problem of systematic modeling of the IPs and bus subsystem in different levels of refinements. In the experiments, we found that by applying our proposed IP and bus modeling methods to the MPEG-4 application, we are able to achieve 4x performance improvement and at the same time, reduce the software development time by 35%, compared to that by conventional modeling methods. IP Modeling and Verification Code reusability: We separate the functional and communication parts of each IP model to achieve systematic code reusability, as shown in Fig. 1 . The main functional behavior is described in the core block while communication is totally delegated to a dedicated routine called "the communication handler," which is prepared for various communication schemes with a unified programming interface. Therefore, all the IPs use the unified bus interface scheme, and this enables an easy adaptation to possible changes in the environment, which include a system bus or even a whole new simulation environment. !
doi:10.1109/date.2006.243954 dblp:conf/date/UmKHKCKEK06 fatcat:7zoi7zd6gjhqlaoqi6haz4lh7u