TUTORIAL BY REX RICE Monday, October 31,1983,8:45 A.M.-5:00 P.M., Town of Rye CAD, TESTING AND PACKAGING TECHNOLOGY FOR VLSI USERS/DESIGNERS CONTENTS: The key technologies for users to design and apply gate array, standard cell, and semi-custom VLSI are covered. Silicon: A brief review of the current technology is presented. Computer Aided Design: A comparison is made on several silicon vendor and purchasable CAD systems. Testing: Testing trends and Level Sensitive Scan Design are reviewed.

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... self-testing methods are discussed. The new equipment needed for LSSD testing is presented. Packaging: Packaging limits VLSI use. Pin grid and top mount packages are covered and many examples shown. Audience: Tutorial is of value to users and designers including system planners, system architects, logic designers, test engineers, CAD programmers and silicon chip designers. Rex Rice is a consulting engineer specializing in digital systems. He has published two books, over thirty papers and holds many patents. At IBM he managed the first transistor computer program and did research on cost oriented packaging. At Fairchild he invented the dual-in-line package, managed the SYMBOL high level language computer project and the world's first large silicon memory system program for the ILLIAC IV main memory. He also managed the design and production of add-on memories for the IBM 360/67 and the development of an in-house micro-controlled computer. Rice received his BA in mechanical engineering at Stanford in 1940. He is an IEEE Fellow, received the 1982 IEEE-CS McDowell award, has served many terms on the IEEE-CS Governing Board, and founded the IEEE-CS Compcons. PROGRAM MONDAY