A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf
.
Layout parameter optimization based power and signal integrity performance improvement of high-speed interfaces of wirebond packages
2013
2013 IEEE 63rd Electronic Components and Technology Conference
The purpose of this paper is to present layout parameter optimization based power and signal integrity performance improvement investigation of high-speed interfaces in wirebond packages. Effects of different sections of signal nets, wirebond diameter, material and other stackup parameters on the noise performance of the package system is discussed in detail. The methodology developed in this paper, based on different sections of power and signal nets and supported by simulation results,
doi:10.1109/ectc.2013.6575871
fatcat:6dmd6rwm3jcdviicwiymofhedy