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Banshee: Bandwidth-Efficient DRAM Caching Via Software/Hardware Cooperation
[article]
2017
arXiv
pre-print
Putting the DRAM on the same package with a processor enables several times higher memory bandwidth than conventional off-package DRAM. Yet, the latency of in-package DRAM is not appreciably lower than that of off-package DRAM. A promising use of in-package DRAM is as a large cache. Unfortunately, most previous DRAM cache designs mainly optimize for hit latency and do not consider off-chip bandwidth efficiency as a first-class design constraint. Hence, as we show in this paper, these designs
arXiv:1704.02677v1
fatcat:uljhy5xcnvdrjnfgi5fj74cgwe