Exploiting FPGA-features during the emulation of a fast reactive embedded system

Karlheinz Weiß, Thorsten Steckstor, Gernot Koch, Wolfgang Rosenstiel
1999 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays - FPGA '99  
This paper presents the emulation of an embedded system with hard real time constraints and response times of about 220µs. We show that for such fast reactive systems, the software overhead of a Real Time Operating System (RTOS) becomes a limiting factor, consuming up to 77% of the total execution performance. We analyze features of different FPGA architectures in order to solve the system performance bottleneck. We show that moving functionality from software to hardware through exploiting the
more » ... fine grained on-chip SRAM capability of the Xilinx XC4000 architecture, that feature eliminates the RTOS overhead by only a slight increase of about 28% of the used FPGA CLB resources. These investigations have been conducted using our own emulation environment called SPYDER-CORE-P1.
doi:10.1145/296399.296469 dblp:conf/fpga/WeissSKR99 fatcat:ikdpk4abzjfx3k6jjeoxezh6wa