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2009 Design, Automation & Test in Europe Conference & Exhibition
This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. The current trend towards MPSoC platforms in most computing domains does not only mean a radical change in computer architecture. Even more important from a SW developer´s viewpoint, at the same time the classical sequential von Neumann programming model needs to be overcome. Efficient utilization of the MPSoC HW resources demands for radically new models and corresponding SW<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/date.2009.5090917">doi:10.1109/date.2009.5090917</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/dz4ubgggofc3dnfqlnyknucgsa">fatcat:dz4ubgggofc3dnfqlnyknucgsa</a> </span>
more »... opment tools, capable of exploiting the available parallelism and guaranteeing bug-free parallel SW. While several standards are established in the high-performance computing domain (e.g. OpenMP), it is clear that more innovations are required for successful deployment of heterogeneous embedded MPSoC. On the other hand, at least for coming years, the freedom for disruptive programming technologies is limited by the huge amount of certified sequential code that demands for a more pragmatic, gradual tool and code replacement strategy. I. 978-3-9810801-5-5/DATE09
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