Temporal precondition verification of design transformations [chapter]

Ranga Vemuri, Anuradha Sridhar
1992 Lecture Notes in Computer Science  
Design transformations are ubiquitous in design derivation systems. Many such transformations have elaborate conditions of applicability known as preconditions. Usually, preconditions have both spatial and temporal components. The temporal (components of the) preconditions are usually specified by associating a dynamic interpretation with the design description at hand. Such dynamic interpretations have a semantic content which is based on interpreting the design description over the domain of
more » ... atural numbers. Thus the problem of precondition verification is just as difficult as the problem of design verification itself. This paper is an informal exposition to the techniques we have used in verifying preconditions of the design transformations in a transformational exploration system for register-level hardware designs. These techniques are based on a purely syntactic interpretation of the design description and avoid the difficulties associated with the theorem proving techniques one could employ when a semantic interpretation is associated. While not as powerful as theorem proving methods, we found these techniques to be adequate for most cases of precondition verification of useful design transformations, at least within the design domain, namely register-level hardware, considered.
doi:10.1007/3-540-55179-4_13 fatcat:ehws5mvgejhb5nf4qeikobagne