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A Hardware-Efficient Pattern Matching Architecture Using Process Element Tree for Deep Packet Inspection
IEICE transactions on communications
This paper proposes a new pattern matching architecture with multi-character processing for deep packet inspection. The proposed pattern matching architecture detects the start point of pattern matching from multi-character input using input text alignment. By eliminating duplicate hardware components using process element tree, hardware cost is greatly reduced in the proposed pattern matching architecture. key words: network intrusion detection system, deep packet inspection, pattern matching, brute-force algorithmdoi:10.1587/transcom.e93.b.2440 fatcat:unoo26b6qnakrm6p65cjhsy2ge