Pareto Optimal Characterization of a Microwave Transistor

Filiz Gunes, Ahmet Uluslu, Peyman Mahouti
2020 IEEE Access  
Herein, noise, gain and port mismatchings of a microwave small-signal transistor are expressed as all the set of acceptable Pareto optimal solutions and trade-off relations within the device operation (V DS , I DS , f ) domain without any need of expert knowledge of microwave device. In this multi-objective optimization problem, non-dominated sorting genetic algorithm (NSGA) -III is applied to an ultra-low noise amplifier (LNA) transistor NE3511S02 (HJ-FET) where the noise F req ≥ F min and
more » ... ut mismatching V outreq ≥ 1 are preferred as the reference points, while the input mismatching V inopt ≥ 1 and gain G Tmax are optimized with respect to source Z S and load Z L within the unconditionally stable working area. Thus, diverse set of the Pareto optimal (the required noise F req , the optimum input V inopt , the required output V outreq , the maximum transducer gain G Tmax ) quadruples are resulted from a fast search of the solution space. Furthermore, the optimum bias condition (V DS , I DS ) and sensitivities of the terminations to fabrication tolerances are also determined using the cost analysis in the operation domain for the required P max , I DSmax and performance quadruple. Finally, this work is expected to enable a designer to provide the feasible design target space (FDTS) consisting of all trade-off relations among all the transistor's performance ingredients to be used in the challenging LNA designs. INDEX TERMS Non-dominated sorting genetic algorithm, Pareto optimal solutions, optimization, impedance mismatching, transducer gain, noise figure. 47900 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ VOLUME 8, 2020
doi:10.1109/access.2020.2978415 fatcat:agtfuilntjgh3fd7x6fdgbgcva