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Pareto Optimal Characterization of a Microwave Transistor
2020
IEEE Access
Herein, noise, gain and port mismatchings of a microwave small-signal transistor are expressed as all the set of acceptable Pareto optimal solutions and trade-off relations within the device operation (V DS , I DS , f ) domain without any need of expert knowledge of microwave device. In this multi-objective optimization problem, non-dominated sorting genetic algorithm (NSGA) -III is applied to an ultra-low noise amplifier (LNA) transistor NE3511S02 (HJ-FET) where the noise F req ≥ F min and
doi:10.1109/access.2020.2978415
fatcat:agtfuilntjgh3fd7x6fdgbgcva