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Compiler-supported simulation of highly scalable parallel applications
1999
Proceedings of the 1999 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing '99
In this paper, we propose and evaluate practical, automatic techniques that exploit compiler analysis to facilitate simulation of very large message-passing systems. We use a compilersynthesized static task graph model to identify the control-flow and the subset of the computations that determine the parallelism, communication and synchronization of the code, and to generate symbolic estimates of sequential task execution times. This information allows us to avoid executing or simulating large
doi:10.1145/331532.331533
dblp:conf/sc/AdveBDPS99
fatcat:obdwb2s3uzdovmmxdmgnpjdkgm