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Future data centers will require novel, scalable memory architectures capable of sustaining high bandwidths while still achieving low memory access latencies. Electronic interconnects cannot meet the challenges presented by the need for multi-terabit off-chip memory data paths. In this work, the electronic bus between main memory and its host processor is replaced with a circuit-switched optical interconnection network. We investigate the impact of our optically connected memory system ondoi:10.1364/jocn.3.000a40 fatcat:kiwrncah35bfbft5ytcgavs2jy