Hierarchical Thermal Management Policy for High-Performance 3D Systems With Liquid Cooling

Francesco Zanini, Mohamed M. Sabry, David Atienza, Giovanni De Micheli
2011 IEEE Journal on Emerging and Selected Topics in Circuits and Systems  
Three-dimensional (3D) integrated circuits and systems are expected to be present in electronic products in the short term. We consider specifically 3D multi-processor systems-on-chips (MPSoCs), realized by stacking silicon CMOS chips and interconnecting them by means of through-silicon vias (TSVs). Because of the high power density of devices and interconnect in the 3D stack, thermal issues pose critical challenges, such as hot-spot avoidance and thermal gradient reduction. Thermal management
more » ... s achieved by a combination of active control of on-chip switching rates as well as active interlayer cooling with pressurized fluids. In this paper, we propose a novel online thermal management policy for high-performance 3D systems with liquid cooling. Our proposed controller uses a hierarchical approach with a global controller regulating the active cooling and local controllers (on each layer) performing dynamic voltage and frequency scaling (DVFS) and interacting with the global controller. Then, the on-line control is achieved by policies that are computed off-line by solving an optimization problem that considers the thermal profile of 3D-MPSoCs, its evolution over time and current time-varying workload requirements. The proposed hierarchical scheme is scalable to complex (and heterogeneous) 3D chip stacks. We perform experiments on a 3D-MPSoC case study with different interlayer cooling structures, using benchmarks ranging from web-accessing to playing multimedia. Results show significant advantages in terms of energy savings that reaches values up to 50% versus state-of-the-art thermal control techniques for liquid cooling, and thermal balance with differences of less than 10 C per layer. Index Terms-Hardware/software co-design, multilayer, multiprocessor system-on-chip (SoC), power modeling and estimation, thermal. Francesco Zanini received three Masters degrees in electronic engineering from
doi:10.1109/jetcas.2011.2158272 fatcat:pt4olh4donardmbn3a7aagshpm