Two new techniques for compiled multi-delay logic simulation

Y.S. Lee, P.M. Maurer
[1992] Proceedings 29th ACM/IEEE Design Automation Conference  
This paper describes two techniques for compiled event driven multi-delay logic simulation that provide significant performance improvements over interpreted multi-delay logic simulation. These two techniques are based on the concept of retargetable branch instructions that can be used to switch segments of code into and out of the instruction stream. Our second algorithm, called the shadow technique, has been designed especially for systems with instruction caches. Benchmark experiments shows
more » ... hese two techniques are up to 15 times faster than our interpreted multi-delay simulator, with an average improvement of about 5 times for our fastest method. Address Delay
doi:10.1109/dac.1992.227767 fatcat:esq5giwe4jhe7cvvrlbkvksryi