This work presents a survey of state-of-the-art delay elements, which are suitable for high-frequency pseudo-differential CMOS ring oscillators. Also, it proposes a novel delay element, which is based on two CMOS inverters loaded by a simple pMOS negative resistance. The delay element is employed to the construction of a 3GHz 4-stage ring oscillator. The ring oscillator performance is designed in order to be compliant with the MIPI Alliance M-PHY standard, which is the most updated high-speed

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... rial interface technology. The proposed delay element and the ring oscillator are simulated with 65nm CMOS process with a supply voltage of 1.2V featuring -94dBc/Hz phase noise, 6.4mA current consumption and an almost constant K VCO equal to 5.7GHz/V.