A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2007; you can also visit the original URL.
The file type is application/pdf
.
The interaction of software prefetching with ILP processors in shared-memory systems
1997
SIGARCH Computer Architecture News
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such a s m ultiple issue, dynamic scheduling, and non-blocking reads. Recent work has shown that memory latency remains a signi cant performance bottleneck for shared-memory multiprocessor systems built of such processors. This paper provides the rst study of the e ectiveness of software-controlled non-binding prefetching in sharedmemory multiprocessors built of state-of-the-art ILP-based
doi:10.1145/384286.264158
fatcat:wvaxpdgn6vgxbilvi66lyk7kwu