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Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications
2007
2007 International Conference on Field Programmable Logic and Applications
This paper presents a novel architecture for domain-specific FPGA devices. This architecture can be optimised for both speed and density by exploiting domain-specific information to produce efficient reconfigurable logic with multiple granularity. In the reconfigurable logic, general-purpose finegrained units are used for implementing control logic and bit-oriented operations, while domain-specific coarse-grained units and heterogeneous blocks are used for implementing datapaths; the precise
doi:10.1109/fpl.2007.4380647
dblp:conf/fpl/HoYLLW07
fatcat:r3bmzlcugfcz5dgd66fkyj2yv4