Functional programming techniques have been used to describe synchronous digital circuits since the early 1980s and have proven successful at describing certain types of designs. Here we survey the systems and formal underpinnings that constitute this tradition. We situate these techniques with respect to other formal methods for hardware design and discuss the work yet to be done. Hardware designs traverse a series of abstraction layers: what might begin as a high-level behavioural model that

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... ddresses architecture issues will, when mature, typically be manually translated into a register-transfer level (RTL) description that captures how the high-level computations are performed by finite-state means using logic gates and memories. This is typically validated against the original model using simulation and testing, or more formally with model checking techniques or a proof assistant. The resulting net lists (circuit schematics represented as graphs) are semi-automatically mapped to an implementation technology and laid out for realisation in silicon. The original motivation for developing domain-specific languages (DSLs) [Mernik et al. 2005] for the upper reaches of this process was to harness the huge increases in transistor densities on silicon chips forecast by Moore's law [Mead and Conway 1980] . It was hoped that productivity would rise with the abstraction level, allowing designs