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Approximate calculations are a new nanotechnology paradigm for improving efficiency and reducing energy use. Most of the logic extends to many contemporary nanotechnological developments and is used for the design of digital circuits in its basic portion (3 input plurality, MV). This paper suggests implementations of additional compressors and ML multiplicators. An additional bit discovery circuit is used for the proposed compressors. The size of the multiplier is calculated by a control factordoi:10.46338/ijetae0621_05 fatcat:4ssbgiqx3vdm5n2bjjdxhpxb54