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CHIP-PACKAGE CO-DESIGN FOR OPTIMIZATION OF 5.8 GHZ LNA PERFORMANCE BASED ON EMBEDDED INDUCTORS
2018
Progress In Electromagnetics Research M
This paper presents the design and demonstration of an optimized land grid array (LGA) structure for low noise amplifier (LNA). In order to achieve better circuit performance, the novel chippackage co-design method based on embedded inductors is used. The optimized structure is accurately modeled by ANSYS software. S-parameter is utilized to help in understanding the contributing to the optimized LGA structure. The simulation results for the novel LNA co-design structure show the gain 14.35 dB
doi:10.2528/pierm18051403
fatcat:kkh4mz6tsvhb3kqicwabzpkldy