Eliminating race conditions in system-level models by using parallel simulation infrastructure

Weiwei Chen, Che-Wei Chang, Xu Han, Rainer Domer
2012 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)  
For a top-down system design flow, a well-written specification model of an embedded system is crucial for its successful design and implementation. However, the task of writing a correct system-level model is difficult, as it involves, among other tasks, the insertion of parallelism. In this paper, we focus on ensuring model correctness under parallel execution. In particular, the model must be free of race conditions in all accesses to shared variables, so that a safe parallel implementation
more » ... s possible. Eliminating race conditions is difficult because discrete event simulation often hides such flaws. In particular, the absence of simulation errors does not prove the correctness of the model. We propose to use advanced conflict analysis in the compiler, fast checking in a parallel simulator, and a novel race-condition diagnosis tool, that not only exposes all race conditions, but also locates where and when such problems occur. Our experiments have revealed a number of dangerous race conditions in existing embedded multi-media application models and enabled us to efficiently and safely eliminate these hazards.
doi:10.1109/hldvt.2012.6418253 dblp:conf/hldvt/ChenCHD12 fatcat:jlmsyaxkcbcuvi32a54w4bbk5a