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Low-power Design of Digital Integrated Circuit Based on UPF Standard
2016
Proceedings of the 6th International Conference on Information Engineering for Mechanics and Materials
unpublished
At present, power consumption has become a factor in design of integrated circuit with growing concern in addition to timing and area. Currently, there are many methods to reduce power consumption. In the paper, standard complete technique of Unified Power Format (UPF) based on IEEE1801 standard is used in the design realization and verification process of one chip in order to utilize various design methods of low power consumption more effectively in design implementation flow. The whole
doi:10.2991/icimm-16.2016.23
fatcat:y7e74xu22bakhnsbcf4i3dxhh4