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Power and Delay Analysis of Logic Circuits Using Reversible Gates
2020
Figshare
This paper determines the propagation delay and on chip power consumed by each basic and universal gates and basic arithmetic functions designed using existing reversible gates through VHDL. Hence a designer can choose the best reversible gates to use for any logic circuit design. The paper does a look up table analysis of truth tables of the reversible gates to find the occurrence of the AND OR, NAND, NOR and basic arithmetic functions, useful to build complex combinational digital logic circuits.
doi:10.6084/m9.figshare.11635347.v1
fatcat:et6t54dagnd3nja3vprfhaz4ry