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Proceedings of the 7th International Workshop on Satisfiability Modulo Theories - SMT '09
The Boolean Satisfiability (SAT) problem is widely researched and the performance of such solvers largely benefit from it. Satisfiability Modulo Theory (SMT) solvers aim to leverage the good performance toward other formalisms with large propositional content. Description logics are an expressive subset of first-order logic with high complexity reasoning that could benefit from this approach. In this paper, we present a SMT-based description logic reasoner, its reasoning techniques, architecture, and some first experimental results.doi:10.1145/1670412.1670417 fatcat:zdvnfgjwqvehpkze2y2ies4rni