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A cryptography core tolerant to DFA fault attacks
2006
Proceedings of the 19th annual symposium on Integrated circuits and systems design - SBCCI '06
This work describes a hardware approach for the concurrent fault detection and error correction in a cryptographic core. It has been shown in the literature that transient faults injected in a cryptographic core can lead to the revelation of the encryption key using quite inexpensive equipments. This kind of attack is a real threat to tamper resistant devices like Smart Cards. To tackle such attacks, the cryptographic core must be immune to transient faults. In this work the DES algorithm is
doi:10.1145/1150343.1150393
dblp:conf/sbcci/MoratelliCL06
fatcat:oqabgjroingu7noaxo6y4gfq5u