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Analysis of Verification Methodologies Based on a SoC Platform Design
2011
International Journal of Contents
In a SoC (system-on-chip) design, a design complexity is a big bottleneck. In order to overcome the design complexity, platform based design method is widely adopted for designers. Most complex SoCs need a heterogeneous design development environment for hardware and software co-design. In this paper, we discuss about some kinds of verification approaches with platform based design methodology at various abstraction levels of SoC design. We separate the verification process to two steps
doi:10.5392/ijoc.2011.7.1.023
fatcat:vn6nefrgergq5d3tjvqtzsgsay