Heterogeneous Systems on Chip and Systems in Package

I. O'Connor, B. Courtois, K. Chakrabarty, N. Delorme, M. Hampton, J. Hartung
2007 2007 Design, Automation & Test in Europe Conference & Exhibition  
This paper discusses several forms of heterogeneity in systems on chip and systems in package. A means to distinguish the various forms of heterogeneity is given, with an estimation of the maturity of design and modeling techniques with respect to various physical domains. Industry-level MEMS integration, and more prospective microfluidic biochip systems are considered at both technological and EDA levels. Finally, specific flows for signal abstraction heterogeneity in RF SiP and for functional co-verification are discussed.
doi:10.1109/date.2007.364683 dblp:conf/date/OConnorCCDHH07 fatcat:5m2bmusl3rfahe77sj267xrzme