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An efficient and scalable approach for implementing fault-tolerant DSM architectures
2000
IEEE transactions on computers
AbstractÐDistributed Shared Memory (DSM) architectures are attractive to execute high performance parallel applications. Made up of a large number of components, these architectures have however a high probability of failure. We propose a protocol to tolerate node failures in cache-based DSM architectures. The proposed solution is based on backward error recovery and consists of an extension to the existing coherence protocol to manage data used by processors for the computation and recovery
doi:10.1109/12.859537
fatcat:4b5ka7itibai7mzqplpg56rcey