Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI

Masakazu Yamashina, Masato Motomura
2000 Proceedings of the 2000 conference on Asia South Pacific design automation - ASP-DAC '00  
This paper first outlines a broad range of reconfigurable computing research activities from a perspective of system LSI designs. Then, the paper focuses onto dynamically reconfigurable logic (DRL) LSI, a prototype chip that we developed to evaluate the reconfigurable computing concept. Through its ability to exchange hardware contexts quickly, this chip can accelerate media/communication applications with customized hardware configurations, yet maintaining scalability towards varying application sizes.
doi:10.1145/368434.368666 dblp:conf/aspdac/YamashinaM00 fatcat:5ic2zr6xufamfahwwhpeyuyw2q