A 16-bit, low-power microsystem with monolithic MEMS-LC clocking

R.M. Senger, E.D. Marsman, M.S. McCorquodale, R.B. Brown
Asia and South Pacific Conference on Design Automation, 2006.  
Fig. 1. Microsystem architecture. Abstract-Single-chip systems save the power dissipation that would be required for chip-to-chip communication, resulting in compact, low-power solutions for battery-powered applications. This paper describes the design and measured performance of a fully-functional digital core with a low-jitter, on-chip, MEMS-LC clock reference. This chip has been fabricated in TSMC's 0.18 m MM/RF bulk CMOS process. Maximum power consumption of the complete microsystem is 48.78mW operating at 90MHz on a 1.8V power supply.
doi:10.1109/aspdac.2006.1594653 dblp:conf/aspdac/SengerMMB06 fatcat:bvx5u6gzdfglna24y7znb4u4mq