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Speedup-Oriented History-Based Tiling Algorithm for the HEVC Standard Targeting an Efficient Parallelism Exploration
2018
Journal of Integrated Circuits and Systems
This paper proposes a history-based tiling algo-rithm intending to increase the speedup when using Tiles. The algorithm is composed of two independent steps that use work-load history information to define the vertical and horizontal boundaries of the Tiles. The workload distribution of previous frames is used as reference to perform the tiling of the current frame, exploiting the temporal similarity between neighboring frames, focusing on improving the speedup. Experimental re-sults show that
doi:10.29292/jics.v13i1.24
fatcat:sxcfudrkxrcpnkkpmant564ujy