Designing Application-Specific Heterogeneous Architectures from Performance Models

Thanh Cong, Francois Charot
2019 2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)  
In this paper, we propose an approach for designing application-specific heterogeneous systems based on performance models through combining accelerator and processor core models. An application-specific program is profiled by the dynamic execution trace and is used to construct a data flow model of the accelerator. Modeling of the processor is partitioned into an instruction set architecture (ISA) execution and a microarchitecture specific timing model. These models are implemented on FPGAs to
more » ... take advantage of their parallelism and speed up the simulation when architecture complexity increases. This approach aims to ease the design of multi-core multi-accelerator architecture, consequently contributes to explore the design space by automating the design steps. A case study is conducted to confirm that presented design flow can model the accelerator starting from an algorithm, validate its integration in a simulation framework, allowing precise performance to be estimated. We also assess the performance of our RISC-V single-core and RISC-V-based heterogeneous architecture models.
doi:10.1109/mcsoc.2019.00045 dblp:conf/mcsoc/CongC19 fatcat:nxpx56t2yna7rhpev4qhutu6ei