Software Design of Digital Receiver using FPGA

G Kudale, B Patil, K Aurobindo
2017 International Research Journal of Engineering and Technology (IRJET)   unpublished
In the past radio receivers were designed with analog circuitry but for overcoming the disadvantages of analog circuitry now all becomes all digitized. So Wireless communication have a great demand in today's world. The digital receiver must be communicated with all the new wireless standards. In RADAR obtaining the information from target devices digital receivers are used. In this proposed paper 70MHz with Doppler taken from digital receiver and ADC sample this analog signal with high
more » ... rate. Sampling technique is used for this is band pass sampling i.e. under sampling. For minimization of sampling rate in digital there is digital down converter (DDC) which is used for frequency translation and better decimation factor. After this process we got a signal which have higher precision and more stability and it's become very easy to collect information from target. This entire architecture digital receiver is implemented in Xilinx IP Core and is captured on FPGA (Spartan 6 SP601) interfaced with ADC (LTC 2107) via FMC connector.
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