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A real-time 64-monosyllable recognition LSI with learning mechanism
2001
Proceedings of the 2001 conference on Asia South Pacific design automation - ASP-DAC '01
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In the paper, a real-time 64-mono-syllable recognition LSI is presented. The LSI accepts 11.6 msec speech frame and outputs a 6-bit symbol-code for each frame by the end of the next frame with the pipelining manner. The recognition method is based on the Hidden Markov Model and is speaker-independent. An on-chip learning mechanism has also been designed, but the circuit is off-chip at present implementation because of the restriction of LSI area. The LSI is fablicated by VDEC Rohm with 0.6 µm process on a 4.5 mm 4.5 mm chip. Address 8 Data
doi:10.1145/370155.370249
dblp:conf/aspdac/NakamuraZMHKW01
fatcat:53z6z4csujbgrllqm6lqk4hcgy