Width-Partitioned Load Value Predictors

Gabriel H. Loh
2003 Journal of Instruction-Level Parallelism  
Value prediction has been proposed for breaking data-dependencies and increasing instruction level parallelism. One of the drawbacks of many of the proposed techniques is that the value predictors require very large hardware structures which use up many transistors and can consume a large amount of energy. In this study, we use data-widths to partition the value prediction structures into multiple smaller structures, and then use data-width prediction to select from these tables. A
more » ... oned value predictor requires less space because small bit-width values get allocated to smaller storage locations instead of using a full 64 bits. The total energy consumption of the predictor is also reduced because only a single smaller predictor table needs to be accessed. Width-partitioning provides a 25.7-46.5% reduction in energy consumption for last value predictors and finite context matching (FCM) predictors. For FCM predictors, width partitioning allows the total size of the second-level tables to be reduced by 75% while still maintaining the same prediction rates of a conventional FCM predictor. Our performance studies indicate that width partitioning does not degrade the geometric mean IPC on the SPEC2000 integer benchmarks, thus showing that width partitioning is an effective technique to reduce the size and energy requirements of value predictors.
dblp:journals/jilp/Loh03 fatcat:phtsjegzdbfnblah6ukwizzv5a