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Parallelizing sparse Matrix Solve for SPICE circuit simulation using FPGAs
2009
2009 International Conference on Field-Programmable Technology
Fine-grained dataflow processing of sparse Matrix-Solve computation (A x = b) in the SPICE circuit simulator can provide an order of magnitude performance improvement on modern FPGAs. Matrix Solve is the dominant component of the simulator especially for large circuits and is invoked repeatedly during the simulation, once for every iteration. We process sparse-matrix computation generated from the SPICEoriented KLU solver in dataflow fashion across multiple spatial floating-point operators
doi:10.1109/fpt.2009.5377665
fatcat:22q5j5nmajdvphn7kpeo6gtsem