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Energy efficiency has become a primary concern in the design of multimedia digital systems, particularly when targeting mobile devices. Approximate computing is a highly promising approach to address this challenge. This paper presents an architectural exploration in a variable block size motion estimation (VBSME) architecture using imprecise Lower-Part-OR Adders (LOA). These adders were applied to Sum of Absolute Differences units (SAD) in order to reduce the energy consumption whiledoi:10.1109/mmsp.2017.8122248 dblp:conf/mmsp/PortoAZPRS17 fatcat:ifvj3wigwzfc7ke5iv7fd24pbm