A Fuzzy Logic Reconfiguration Engine for Symmetric Chip Multiprocessors

Muhammad Yasir Qadri, Klaus D. McDonald-Maier
2010 2010 International Conference on Complex, Intelligent and Software Intensive Systems  
Recent developments in reconfigurable multiprocessor system on chip (MPSoC) have offered system designers a great amount of flexibility to exploit task concurrency with higher throughput and less energy consumption. This paper presents a novel fuzzy logic reconfiguration engine (FLRE) for coarse grain MPSoC reconfiguration that facilitates to identify an optimum balance between power and performance of the system. The FLRE is composed on two levels of abstraction layers. The system selects an
more » ... timal configuration of Level 1 / Level 2 cache size and Associativity, processor operating frequency and voltage, the number of cores based on miss rate, and energy and throughput information of the system both at core and SoC level. An 8-core symmetric chip multiprocessor has been used to evaluate the proposed scheme. The results show an overall decrease of energy consumption with not more than 30% decrease in the throughput.
doi:10.1109/cisis.2010.66 dblp:conf/cisis/QadriM10 fatcat:eemedvmphbbsbcmbzlcj4gzwna