Overview and Investigation of SEU Detection and Recovery Approaches for FPGA-Based Heterogeneous Systems [chapter]

Ediz Cetin, Oliver Diessel, Tuo Li, Jude A. Ambrose, Thomas Fisk, Sri Parameswaran, Andrew G. Dempster
2016 FPGAs and Parallel Architectures for Aerospace Applications  
Growing international interest in the development of space missions based on low-cost nano-/microsatellites demands new approaches to the design of reliable, low-cost, reconfigurable digital processing platforms. To meet these requirements, future systems will need to include applicationspecific processors to handle control-dominated tasks and hardware accelerators to cope with data-intensive workloads. COTS FPGAs provide an ideal platform for meeting these requirements with
more » ... application-specific processors implemented as soft or hard cores along with hardware accelerators on FPGA fabric. However, the main challenge to deploying reconfigurable systems in space is mitigating the impact of radiation-induced Single Event Upsets (SEUs). In considering the design of such heterogeneous systems, we present a survey of techniques commonly employed to guard against soft errors in applicationspecific processors targeted at ASICs and assess their suitability to FPGA implementation when partial reconfiguration is used to deal with SEUs in logic circuits. Finally, we report on the development of the RUSH payload, to be deployed on the UNSW-EC0 CubeSat due for launch in 2015, to test our design approach.
doi:10.1007/978-3-319-14352-1_3 fatcat:xacsi5oy3neyzbyfc6rgoocrqy