Networks-on-Chip for heterogeneous 3D Systems-on-Chip [article]

Jan Moritz Joseph, Universitäts- Und Landesbibliothek Sachsen-Anhalt, Martin-Luther Universität, Thilo Pionteck
Recently proposed manufacturing methods enable the production of heterogeneous 3D System-on-Chips (3D SoCs), in which dies manufactured in different technology nodes are stacked and vertically interconnected. This allows for the combination of components with different electrical requirements on a single chip. One example of such systems are "Vision System-on-Chips" that combine analog image sensors, analog-digital converters and digital signal processing. Communication architectures using the
more » ... dvantages of heterogeneity have not been considered prior to this thesis.We propose Asymmetric 3D Networks-on-chips (A-3D NoCs) for this purpose. A-3D NoCs are NoCs that target heterogeneous 3D SoCs and further exploit the specific properties of silicon dies in disparate technologies. Asymmetry for 3D NoCs is a novel design paradigm, offering advantages in performance, power consumption and area. It further unleashes the full potential of heterogeneous integration for the network itself. The approach of this thesis is twofold: First, we consider A-3D NoCs on a system level to take the advantages of heterogeneous integration for NoC planning including, optimized topology and placement. Second, we improve routers on an architectural and micro-architectural level to tackle technological challenges emerging from heterogeneity. This thesis provides the following specific contributions: The design space of A-3D NoCs is modeled. Technology-specific features are taken into account, in contrast to models for conventional on-chip networks. This results in a deeper understanding of the design space and leads to a systematic approach for its exploration. Next, we propose an analytical approach to system-level optimizations by means of modeling via linear programs for exact solutions and heuristics for efficient solutions. For the first time, models account for technology-specific properties of routers and components. Furthermore, routers and components are placed simultaneously. This combination of models and methods is necessary beca [...]
doi:10.25673/14125 fatcat:fvnvzfo6dreebobijn2yiabsfa