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900MHz to 1.2GHz Two-Phase Resonant Clock Network with Programmable Driver and Loading
2006
IEEE Custom Integrated Circuits Conference 2006
Preserved Fulltext
A resonant clock network with programmable driver and loading is designed in a 0.13µm CMOS technology. The 2mm×2mm distribution network has on-chip inductors and performs a forced oscillation at the rate of a reference clock programmable in the 900MHz to 1.2GHz range. Clock amplitude and energy efficiency trade-offs at and off resonance are explored with various driver configurations. Energy efficiency per cycle is 1.39 to 1.56 times greater than previous resonant distribution networks.
doi:10.1109/cicc.2006.320995
dblp:conf/cicc/ChuehSP06
fatcat:bcg6kk5vjje3tmtoszf5uzkjya