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This paper addresses the design of asynchronous circuits for low power through an example: a filter bank for a digital hearing aid. The asynchronous design re-implements an existing synchronous circuit which is used in a commercial product. For comparison, both designs have been fabricated in the same 0.7-m CMOS technology. When processing typical data (less than 50-dB sound pressure), the asynchronous design consumes 85 W-a fivefold reduction compared to the synchronous design. This has beendoi:10.5860/choice.39-2818 fatcat:6uhfw7oi7jcnvlhf3tjfzq4abq