Implementation of LDPC Decoder using High-speed Algorithms in Standard of Wireless LAN
무선 랜 규격에서의 고속 알고리즘을 이용한 LDPC 복호기 구현

Chul-Seung Kim, Min-Hyuk Kim, Tae-Doo Park, Ji-Won Jung
2010 The Journal of the Korean Institute of Information and Communication Engineering  
In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen 802.11n for wireless local access network(WLAN) standard, require a large number of computation due to large size of coded block and iteration. Therefore, we presented three kinds of low computational algorithms for LDPC codes. First, sequential decoding with partial group is proposed. It has the same H/W complexity, and fewer number of iterations
more » ... ber of iterations are required with the same performance in comparison with conventional decoder algorithm. Secondly, we have apply early stop algorithm. This method reduces number of unnecessary iterations. Third, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and early stop algorithm is reduced more than one iteration and computational complexity of early detected method is about 30% offs in case of check node update, 94% offs in case of check node update compared to conventional scheme. The LDPC decoder have been implemented in Xilinx System Generator and targeted to a Xilinx Virtx5-xc5vlx155t FPGA. When three algorithms are used, amount of device is about 45% off and the decoding speed is about two times faster than convectional scheme. 키워드 저밀도 패리티 체크 부호, 부분 병렬 알고리즘, early stop 알고리즘, early detection 알고리즘
doi:10.6109/jkiice.2010.14.12.2783 fatcat:yvssgxos3bg6pmqeanoc7urlgu