A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2022; you can also visit the original URL.
The file type is application/pdf
.
Design and Analysis of Power Consumption of MPPT Controller in 130 nm CMOS Technology
2022
Zenodo
This paper deals with design of a digital circuit for the Maximum Power Point Tracking (MPPT), especially analysis of its energy consumption. The circuit is based on a widely used direct tuning algorithm called Perturb & Observe (P&O). The digital circuit was designed at Register Transfer Level (RTL) using the descriptive language Verilog. The proposed digital circuit was synthesized in standard 130 nm CMOS technology, where also Place and Route (P&R) was performed.
doi:10.5281/zenodo.7116650
fatcat:tcpjaupesnfdtcpmuvt5nnhuay