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The aim of this work is the study of switched-current and voltage-mode memory cells in order to develop a model including non-ideal effects such as charge injections, nonlinear capacitance and readout system influence. These models will allow non-linearity control regard to surface, speed and power criteria in digital dedicated submicrometer technology. Such models lead to a memory cell optimization in order to include it in an analog memory. The goal of our work is to identify accuracy limitsdoi:10.5170/cern-2000-010.530 fatcat:pksrghircjdxrev7s6slczilde