A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2005; you can also visit the original URL.
The file type is application/pdf
.
Low frequency noise in GaAs heterodimensional junction field effect transistors
2000
Electronics Letters
An investigation is presented into the low frequency noise in GaAs heterodimensional junction field effect transistors (HD JFETs) at room and elevated temperatures. The Hooge parameter at zero gate bias was calculated to be 2 × 10 -3 for the devices. The temperature dependence of the noise was used to determine the trap level with an activation energy of 0.7eV. Recently, a new generation of semiconductor devices has emerged. These devices utilise interfaces between semiconductor regions of
doi:10.1049/el:20000498
fatcat:4ogh2n5cwfcajaopybufb354um