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Static bus schedule aware scratchpad allocation in multiprocessors
Compiler controlled memories or scratchpad memories offer more predictable program execution times than cache memories. Scratchpad memories are often employed in multi-processor system-onchip (MPSoC) platforms which seek to meet the performance needs of embedded applications while limiting power consumption and timing unpredictability. Scratchpad allocation schemes optimize performance while ensuring predictable execution times (as compared to caches). In this work, we develop a compile-timedoi:10.1145/2345141.1967680 fatcat:rq3tu3rsq5fepahhcddzxigzam