Pseudo-resistor circuits are used to mimic large value resistors and base their success on the reduction of occupied area with respect to physical devices of equal value. This paper presents an optimized architecture of pseudo-resistor, made in standard CMOS 0.35 µm technology, to bias a low-noise Trans-Impedance Amplifier for high sensitivity applications in the frequency range 100 kHz -10 MHz. The architecture was selected after a critical review of the different topologies to implement

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... alue resistances with MOSFET transistors, considering their performance in terms of linearity of response, symmetric dynamic range, frequency behavior and simplicity of realization. The resulting circuit consumes an area of 0.017 mm 2 and features a tunable resistance from 20 MΩ to 20 GΩ, dynamic offset reduction thanks to a more than linear I-V curve and a high-frequency noise well below the one of a physical resistor of equal value. This latter aspect highlights the larger perspective of pseudo-resistors as building blocks in very low-noise applications in addition to the advantage in occupied area they provide. Index Terms-Pseudo-resistor, High-value resistor, Active resistor, Tunable resistor, CMOS. © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.