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Deadlock Recovery Technique in Bus Enhanced NOC Architecture
2012
International Journal of VLSI Design & Communication Systems
Increase in the speed of processors has led to crucial role of communication in the performance of systems. As a result, routing is taken into consideration as one of the most important subjects of the Network on Chip architecture. Routing algorithms to deadlock avoidance prevent packets route completely based on network traffic condition by means of restricting the route of packets. This action leads to less performance especially in non-uniform traffic patterns. On the other hand True Fully
doi:10.5121/vlsic.2012.3401
fatcat:vkmshgss6vgcvl45b3hjareaoq