Improving Branch Prediction and Predicated Execution in Out-of-Order Processors

Eduardo Quinones, Joan-Manuel Parcerisa, Antonio Gonzailez
2007 2007 IEEE 13th International Symposium on High Performance Computer Architecture  
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Although it is globally beneficial, it has a negative side-effect because the removal of branches elimienables a very efficient implementation of if-conversion for an out-of-order processor; with almost no additional hard-ware cost, because the same hardware is used to predict the predicates of if-converted code and to predict branches without accuracy degradation.
doi:10.1109/hpca.2007.346186 dblp:conf/hpca/QuinonesPG07 fatcat:eqz2vp4m6ndg5ilsslmko27bkq