A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2019; you can also visit the original URL.
The file type is application/pdf
.
Heterogeneous Multi-core Architectures
2015
IPSJ Transactions on System LSI Design Methodology
Transistor count continues to increase for silicon devices following Moore's Law. But the failure of Dennard scaling has brought the computing community to a crossroad where power has become the major limiting factor. Thus future chips can have many cores; but only a fraction of them can be switched on at any point in time. This dark silicon era, where significant fraction of the chip real estate remains dark, has necessitated a fundamental rethinking in architectural designs. In this context,
doi:10.2197/ipsjtsldm.8.51
fatcat:wgiuptlmvvgnhdt2bjrcio6oqi